From: MitchAlsup@aol.com
Newsgroups: comp.arch
Subject: Re: On-current, voltage and GHz
Date: 28 Sep 2005 07:53:23 -0700
Message-ID: <1127919203.526765.161770@o13g2000cwo.googlegroups.com>

Nick Maclaren wrote:
>     There seems to be a near-insoluble choice between CPU power
>     and low electrical power, and it is likely that the multiple
>     core systems will have lower serial performance than the single
>     core ones (and not just initially).

What is happening is the end of the (simple) voltage scaling era.

In the past we had enough Vdd (voltage) such that we had about 4*Vtns
(four threshold voltages) between ground and rail (Vdd). With this much
margin lots of analog transistor effects could be used (sense
amplifiers, delay circuits,...).

Now this is changing. To control the leakage currents one wants to
increase the Vtn since leakage current is a very strong function of Vtn
(higher is lots better). On the other hand, IdSat is also strong
function of Vtn in the opposite direction (lower is better--but the
speed effect is not as strong as the leakage effect wrt Vtns). So one
has to carefully choose between fast transistor performance and low
leakage. Processors used to simply go for the fastest transistors
possible, while DRAMs went for the lowest leakage transistors possible
(at any given process step).

Finally, in the 90nm-45nm the wires are getting slower just about as
fast as the transistors are getting faster. Simple scaling indicates
that wires should be insensitive to shrinking, as lower capacitance is
balanced with higher resistance. But with the metalurgy involved
(especially barrier metals) the conducting part of the wires is
shrinking faster than the lithography, and by using rather tall aspect
ratio of the wires, the sidewall capacitance is not shrinking as fast
as scaling would imply. Both effects make the wires slower.

An awful lot of power in modern processors is condumed by the various
predictors, buffers, and queues. An unuseful amount of this power then
gets throw into the trash when the speculation(s) are found to be
incorrect.

>     I have been unable to find out anything useful about Intel's
>     ultra-low power process performance - 2x lower, 10x lower or
>     what?  If it is only 2x, then the process looks VERY interesting
>     for multi-core work.  If 10x, forget it for that.

I suspect (without any actual knowledge) that Intel has found a small
range of Vtns with carefully controled doping profiles and gate oxide
thicknesses and sidewall spacers where they can get reasonable leakage
and at the same time reasonable transistor performance. This is after
Intel has simultaneously gone through the design(s) and done all of the
acedemic power controlling tricks (and then some).